Multiple differential pair circuits consist of N differential pairs of transistors operating in parallel, each having an appropriate input offset voltage. Multiple differential pair circuits are well-known and have many applications, including amplifiers, mixers, filters and other active elements. For a detailed discussion of conventional multiple differential pair circuits implemented in bipolar technology and their applications, see, for example, B. Gilbert, "The Multi-Tanh Principle: A Tutorial Overview," IEEE J. of Solid-State Circuits, Vol. 33, 2-17 (January 1998), incorporated by reference herein.
FIG. 1 illustrates a conventional multiple differential pair circuit 100. The illustrative multiple differential pair circuit 100 consists of five (5) differential pairs of transistors 200-1 through 200-5 coupled in parallel. A representative differential transistor pair circuit 200 is discussed below in conjunction with FIG. 2. Four (4) of the five (5) differential transistor pair circuits 200-1, 200-2, 200-4, 200-5, each have a corresponding well-defined offset voltage .DELTA.-1, .DELTA.-2, .DELTA.-3, .DELTA.-4, shown in FIG. 1. Thus, the differential transistor pair circuit 200-3 in the middle of the multiple differential pair circuit 100 does not have an offset voltage, while the other differential transistor pair circuits 200-1, 200-2, 200-4, 200-5 have a corresponding offset, .DELTA.. As the differential transistor pair circuits 200-N progress away from the center differential transistor pair circuit 200-3, the offset voltage, .DELTA., increases progressively, taking values of .+-..DELTA., .+-.2.DELTA. and so on, in a known manner. When configured in this manner, such circuits are referred to as equidistant-offset multiple differential pair circuits.
FIG. 2 is a schematic block diagram of a representative differential transistor pair circuit 200. The two transistor devices 210-1 and 210-2 that comprise the differential transistor pair circuit 200 are identical (i.e., perfectly matched), in a known manner. For a given applied voltage, V.sub.IN, a desired output current, I.sub.1, I.sub.2, can be obtained from the differential transistor pair circuit 200 by varying the bias current, I.sub.O.
Bipolar transistors, and thus, bipolar differential transistor pair circuits 200, have well-defined voltage-current (V-I) characteristics. Differential transistor pair circuits 200 have been implemented using bipolar transistors (or CMOS transistors operating in sub-threshold ranges where they behave like bipolar transistors), where the voltage-current (V-I) characteristic is exponential. FIG. 3 illustrates the voltage-current (V-I) characteristic 300 of the differential transistor pair circuit 200, shown in FIG. 2. Transistors having exponential voltage-current (V-I) characteristics were thought to be required in order to obtain multiple differential pair circuits 100 having a transconductance, g.sub.m, that is linearly proportional to the bias current.
As apparent from the above-described deficiencies with conventional multiple differential pair circuits, a need exists for multiple differential pair circuits comprised of pairs of transistors having non-exponential voltage-current (V-I) characteristics. A further need exists for a multiple differential pair circuit that provides both linearity and linear tuning capabilities, independent of the transistor technology.